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Support for the ASUS P2B motherboard.



Modified: trunk/SerialICE/Kconfig
===================================================================
--- trunk/SerialICE/Kconfig	2009-11-18 20:30:57 UTC (rev 45)
+++ trunk/SerialICE/Kconfig	2009-11-19 09:23:30 UTC (rev 46)
@@ -50,6 +50,9 @@
 config BOARD_THOMSON_IP1000
 	bool "Thomson IP1000"
 
+config BOARD_ASUS_P2B
+	bool "ASUS P2B"
+
 endchoice
 
 config BOARD_INIT
@@ -61,6 +64,7 @@
 	default "msi_ms6178.c" if BOARD_MSI_MS6178
 	default "rca_rm4100.c" if BOARD_RCA_RM4100
 	default "thomson_ip1000.c" if BOARD_THOMSON_IP1000
+	default "asus_p2b.c" if BOARD_ASUS_P2B
 
 choice
 	prompt "Target communication"

Added: trunk/SerialICE/mainboard/asus_p2b.c
===================================================================
--- trunk/SerialICE/mainboard/asus_p2b.c	                        (rev 0)
+++ trunk/SerialICE/mainboard/asus_p2b.c	2009-11-19 09:23:30 UTC (rev 46)
@@ -0,0 +1,45 @@
+/*
+ * SerialICE 
+ *
+ * Copyright (C) 2009 Mark Marshall <mark.marshall at csr.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/*
+ * This is a chipset init file for the ASUS P2B mainboard.
+ */
+
+#define PNP_PORT                  0x3f0
+
+static void superio_init(void)
+{
+	/* Enter the configuration state. */
+	pnp_enter_ext_func_mode(PNP_PORT);
+
+	/* COMA */
+	pnp_set_logical_device(PNP_PORT, 2);
+	pnp_set_enable(PNP_PORT, 0);
+	pnp_set_iobase0(PNP_PORT, CONFIG_SERIAL_PORT);
+	pnp_set_irq0(PNP_PORT, 4);
+	pnp_set_enable(PNP_PORT, 1);
+
+	/* Exit the configuration state. */
+	pnp_exit_ext_func_mode(PNP_PORT);
+}
+
+static void chipset_init(void)
+{
+	superio_init();
+}